In order to reduce development time, electronic equipment manufacturers and PCB designers need to ascertain the thermal aspects at the earliest possible stage of the design process. In the early days of thermal management thermal analysis to supply such information was conducted mainly by thumb ruling and simplified correlation-based calculations, rendering somewhat of an expected over-design (most recommended Reference below).
With the emergence of computer-Aided Engineering (CAE) and especially Computational Fluid Dynamics (CFD), it was widely adopted for the thermal management of electronic systems and modules to improve design-cycle time and iteration expense and provide a tight thermal prediction which allows the electronic designer an enhanced productivity and utilization of capabilities (Recommended Reference below).
However, as commercial software vendors keep improving the abilities and capabilities of their thermal management packages, the influence of the thermal engineer on performance and reliability of the design has also increased and incorrect thermal design decisions may even result in catastrophic field failures.
The post based on a series of lectures I gave in 2014-2016 and is aimed at providing some “best practice” guidelines for thermal design and analysis of electronic equipment, ranging from pre-simulation thermal modeling, followed by decisions about thermal design, to the final goal of component to package level thermal validation of a thermal design by computerized simulation and analysis.
The methodology shall begin with package level and work its way up to board and then system thermal design and analysis considerations:
- Part I: package level modeling and TIMs.
- Part II: board level modeling and cooling solutions.
- Part III: Chassis level analysis, CFD and turbulence modeling and an objective review of commercial software packages
Component Level Thermal Design and Analysis
Thermal Modeling of IC packages
As soon as CAE became dominating capable tool, the industry had begun to realize that although state-of-the-art commercial software packages allow solving pure conduction linear equations in a “blink of an eye”, the predictions suffer from severe inaccuracies due to unsatisfactory thermal modeling of the package itself. As a detailed model is proprietary data of a package manufacturer, thermal models are frequently based on a thermal resistance network containing two (e.g. junction to case) or more nodes describing the thermal characteristics of the package by its vendor and based on JEDEC standardization.
Thermal engineers then apply those thermal resistances to construct a simplified component thermal model (CTM) intended to reproduce the thermal performance of a component in a wide variety of simulations, following a common say that “it’s the best they have”. The most common characteristics to be given are the junction to ambient thermal resistance (JESD51-2A) and junction to board/case thermal resistance (JESD51-8).
A two resistor thermal model
However, care is rarely taken to the fact that these characteristics are both environment and boundary condition dependent while the board test measurements are standardized (JESD51-9 to JESD51-11), often rendering such a thermal model as unsatisfactory for the purpose of a general application environment thermal simulation.
Simulation of JESD51-2A junction to ambient
thermal resistance experiment
So how can a valid thermal model for a package be constructed?…
The answer to the question came around about 15 years ago, under the umbrella of “DEvelopment of Libraries of Physical models for an Integrated design environment” (or in short – DELPHI). DELPHI models are constructed such that they are Boundary-Condition Independent (BCI). Models that satisfy this requirement can be used in any application-speciﬁc environment and are to be developed by the vendors without any information about the operating environments.
However, such models are usually to be found only for components such as FPGAs, DSPs, Processors and generally those which both highly thermal dissipative and critical in the board (which is somewhat of an understood albeit unsatisfactory situation).
DELPHI compact model (from JEDEC JC15-1)
So if BCI models are seldom given should we not analyze to component level at all?
Certainly not. First, always try to ask the vendor for a sophisticated thermal resistance network if the specific component is known to be close to its derating range for some application-speciﬁc environments upon which its reliability is endangered. Nonetheless, to get truly tight on safety of margin I would recommend a new but highly sophisticated tool developed recently by Mentor Graphics (I’m not getting paid for that, just was given a private webinar… 😉 ) called T3STER, a HD/SW tool for accurate thermal characterization of ICs (transient and steady-state).
Mentor Graphics T3ster for accurate
thermal characterization of ICs
Subsequently to obtaining an accurate thermal characterization of an IC, the next step is constructing a thermal model. In dedicated thermal management commercial software packages (FloTHERM, ICEPAK, Coolit, 6SigmaET, etc…) it is possible to define thermal resistance networks as objects. Otherwise, if a general FEA/FV code is at hand and in the common case of a 2- resistors characterization, a Compact Conduction Model (CCM) comparable to Compact Resistor Model should be constructed according to the relation:
where L is the heat flux average traveling length, A is the average normal to heat flux area of expansion, R is the specific thermal resistance (given by vendor) and K the conductivity to be calculated for the thermal model.
It should be remembered that thermal resistance between two surfaces is essentially The temperature difference between two isothermal surfaces divided by the heat that ﬂows between them, as such, local temperature differences in close proximity to the package top/bottom are not the goal of the analysis (and should be regarded as inaccurate no matter how refined is the mesh), but the global picture of the flux should match the physics.
A further important issue is modeling of thermal vias. Thermal vias whether they are through the entire PCB or blind to a certain layer may improve the normal to PCB plane thermal resistance by a considerable amount. This is especially important for IC’s which contain hundreds of them (such as ball-grid array FPGAs) or when the thermal design is tight on safety of margin due to extreme high temperature environmental conditions such as for airborne electronic equipment or sensitive highly thermal dissipative component. Modeling of such a volume filled with vias is straightforward in dedicated thermal management commercial packages where it is possible to define an object of such, but in general, the simplistic view would be replacing a comparable volume (a box) of the PCB, generally modeled as an orthotropic material (with a normal-to-plane conductance and an in-plane conductance which is about an order of magnitude larger – I shall return to that in Board Level Thermal Design and Analysis) with a volume (same size box) of the same in-plane conductance and an improved normal-to-plane conductance (It’s easy to calculate, happy to share privately on demand 🙂 ).
Thermal vias in PCB
now for some package thermal modeling myths to be refuted…
- The intent of junction to ambient thermal resistance characteristic is solely for a thermal performance comparison of one package to another in a standardized environment. This methodology is not meant to and will not predict the performance of a package in an application-speciﬁc environment.
- The thermal characterization parameters, ΨT and ΨA, have the units of K/W but are mathematical constructs rather than thermal resistances because not all of the heating power ﬂows through the exposed case surface.
- In all cases, a thermal resistance can be deﬁned, but in many practical cases, the physical signiﬁcance of the deﬁnition is subject to doubt, with the exception of those deﬁnitions that incorporate the ultimate heat sink (an ambient at uniform temperature) as one of the nodes. As a consequence, the widespread notion of a universal analogy between electrical and thermal resistance hampers a correct understanding of the physics. It should be remembered always that heat transfer is a 3D phenomena described by Navier-Stokes, an energy equation (e.g. convection and conduction) and a radiation representing relation incorporating reciprocity and an extremely complex and circular cause and effect relations between its dependent variables.
- The accuracy of a compact thermal model as should be related to a calibrated detailed model for specific boundary condition. One may never deduce accuracy of a CTM by CFD analysis which is dependable on many uncertainties ranging from material properties to turbulence modeling.
Cooling enhancement on package level – Thermal Interface Materials (TIMs)
When cooling of highly thermal dissipative components dominated by conduction through the PCB does not suffice, thermal management dictates the addition of another dominating heat flow path mechanism. This is often conducted by the addition a heat spreader, whether it is for improved conduction such as present in ruggedized cover design or on convection mode by the enlargement of the wetted surface area above the component by fins (plate/pin).
Due to micro-level imperfections in the mating surfaces of the spreader and the component, the actual contact area could be as little as 1 % of what is apparent on a macroscopic level (air-filled gaps with very low thermal conductivity of 0.026 W/(m∙K) ):
Air gap in touching surfaces due to imperfections (left)
Vs. touching interface filled (right)
In some applications the distance between the surfaces is larger due to the construction of the mechanical outline (tolerance build) or natural accuracy of nominal component size, there will be no contact at all between the materials and a gap filler is needed:
Thermal gap filled by gap filler
in non-touching surfaces
Thermal management engineers tend to relate to TIMs according to their material thermal conduction as supplied by the vendor, while the actual thermal resistance is a function of both thermal conduction of the specific material but also the thermal resistance related to the contact between the TIM and the mating surfaces:
TIM thermal resistance
Saying all that, the TIM thermal resistance is far from being the only characteristic important while evaluating which TIM to choose.
- Thermal conductivity within the material – off course there is a direct impact of this parameter on thermal performance, in what follows we shall see that choosing a highly conductive material has its tradeoffs.
- Conformability and “wetting” of surfaces – As explained above, we would like the contact resistance between the TIM and mating surfaces (component and heat sink) to be low.
- Compressibility characteristics of material – in order to achieve a thermally conductive material gap pads, Consist of polymer matrices (low thermal conductivity) are added with high thermally conductive particles or fibers embodied. Trade-off between the ability to deform and the thermal conductivity: The more filler used the harder the pad will get.
- Reliability – While supplying a ruggedized module or a computer processor with a heat-sink attached we wouldn’t like for its performance to deteriorate sharply in a short time. In order to achieve an acceptable deterioration time reliability tests consisting of high and low temperature cycles and a vibratory test should be performed to asses and benchmark TIMS life expectancy.
- Environmental sustainability – Besides long-term reliability it should choosing a specific TIM should be also affected by the immediate environmental conditions that the TIM is going to be exposed to.
Types of TIMs:
- Thermal grease: highly conformable material that wets the surfaces well under low pressures, Often made of silicone, the grease itself has very low thermal conductivity but it is enhanced by loading the grease with highly conductive particles. A very thin layer could be applied due its low viscosity. The main disadvantage is that it is messy during the application, could “pump out”, dry and tolerances must be adjusted accordingly.
- Phase-Change Materials (PCMs): solid at room temperature, but changes to liquid state as it heats up. Mostly organic PCMs are widely the organic type (paraffin, fatty acids, etc…).
Among the advantages of PCMs are a suitable melting point (typically between 50°C and 90°C), high heat of fusion, good stability during thermal cycling, low viscosity in liquid state, high thermal conductivity. The main advantages of PCM over thermal grease are that it is easier to work with and has better stability over time.
The disadvantages of choosing PCMs (over thermal grease) is that thermal performance is slightly lower as both the bulk material thermal conductivity is lower, the surface resistance is higher and a higher contact pressure is needed, increasing the mechanical stresses in the thermal package.
Phase change material
- Gap pads: thicker materials (typically 0.2mm-3mm) that can be used if the surfaces in the thermal interface are not in direct contact with each other, hence serve as gap fillers. Gap pads usually consist of polymer matrices (low thermal conductivity) with high thermally conductive particles or fibers embodied, hence a Trade-off between the ability to deform and the thermal conductivity is met: The more filler used the harder the pad will get.
Among the advantages of using a gap pad is that they can be deformed and are therefore not sensitive to tolerance issues in the assemblies.
The disadvantages of choosing to use gap pads in for the thermal design is that the larger thickness serves as larger distance for heat to travel and hence “bulk” thermal resistance is increased. surface resistance increases or that the TIM loosens from the surface if the applied pressure is too low.
Thermal gap pad
- Putties: The main matrix is often silicon based with filler materials such as aluminium or boron nitride and serve as gap fillers. The denser a putty material is used the harder it is to compress and there is a trade-off between the ability to deform and the thermal conductivity: The more filler used the harder the pad will get. The pressure applied to compress putties is time dependent with a peak during the initial phase before the material relaxes.
Among the advantages of using putties is that they compress at low pressures (good for the components), reusable and have a thermal conductivity of up to 17 W/(m∙K).
The disadvantages of choosing to use putties for the thermal design is that adhesiveness is more pronounced then gap pad making large surfaces filled putty harder to disassemble. Furthermore, they may “pump out” after continuously temperature cycled.
- Carbon-based TIMs: By bonding to other elements or to other carbon atoms, a great variety of materials can be formed (nano-materials), all with different mechanical and thermal properties: Diamond, Graphite, Graphene and Carbone-nano-tubes, Pyrolytyc Graphite. It’s all about playing with the connections and their orientation.
Among the advantages of using Carbon-based materials is the control over mechanical properties (CTE, thermal and electrical conductivity, hardness).
The major (and sometimes “show stopper”) disadvantage is that they are very expensive due to production process (as CVD).
Carbon (Graphene) sheet
- Thermal Gels: grease-like from the beginning. However, after they have been applied and conformed to the surface, they are treated with heat to transform into a thin rubber film. gels can be applied to gaps up to 3 to 5mm without sagging.
Among the advantages of using thermal gels are that they are less messy to work with and easier to remove than the grease, don’t “dry out” and could be applied at higher tolerances.
Thermal grease main disadvantages are that they are costly due to a an extra curing step is needed during the manufacturing process and especially that good Care should be taken for method of application.
A very recommended book: